This invention relates to regenerative dividers, and particularly to wideband, microwave regenerative dividers.
High-speed frequency dividers are often used as prescalers in phase-locked loop frequency synthesizers to reduce the output frequency of a voltage-controlled oscillator (VCO) to a frequency within the frequency range of conventional solid-state counters. A phase-locked loop can thus be constructed using counters which cannot operate at the frequency of operation of the VCO. For many applications direct division using emitter-coupled logic (ECL) is feasible. However, ECL has an upper frequency limit of approximately 1 GHz. Regenerative dividers are operable beyond this range.
In one regenerative divider configuration, described by R. L. Miller in "Fractional-Frequency Generators Utilizing Regenerative Modulation," Proceedings of the IRE. Vol. 27, pp. 446-456, July, 1939, the output of a balanced modulator is serially connected to a filter network and an amplifier in the forward path of a feedback loop. One input of the modulator is the divider input, and the amplifier output is fed back to the second input of the modulator. The filter network is tuned to half the input frequency. At steady state, the amplifier output frequency is half the input frequency, and the difference frequency generated by the modulator is filtered and amplified to reinforce the output frequency.
A regenerative divide-by-two circuit of this type which has been used with an input frequency of 3990 MHz is described by S. V. Ahamed et al. in "Study and Fabrication of a Frequency Divider-Multiplier Scheme for High-Efficiency Microwave Power," IEE Transactions on Communications, Vol. COM-24, No. 2, pp. 243-9, February, 1976. This circuit is part of an 8.2 W, microwave FM power amplifier for the 4 GHz band which operates on a frequency divide, amplify, and multiply scheme.
Harrison, in U.S. Pat. No. 4,152,680, shows a broadband frequency divider using microwave varactors interconnected with microstrip or stripline transmission lines to form a resonant circuit which supports oscillation at one-half the input signal frequency. In the embodiment shown in FIG. 8, the resonant frequency of the device varies as a function of the reverse DC bias applied to two varactors by way of pads 36 and 40. The divider operates open-loop.
Onyshkevych, Kosonocky and Lo described a varactor diode subharmonic generator, with contemplated applications in computer logic and memory, which reportedly operated at 2-4 GHz. This subharmonic generator is reported in "Parametric Phase-Locked Oscillator - Characteristics and Applications to Digital Systems," IRE Transactions on Electronic Computers, Volume EC-8, No. 3, September 1959, pp. 277-286.
A single-tuned regenerative frequency divider employing a tuned circuit in a feedback loop constructed around a mixer amplifier is shown in U.S. Pat. No. 2,926,244 to Stryker. The tuned circuit, which is an LC tank circuit, is tuned to a fixed frequency. This divider circuit includes a rectifier-multiplier in the feedback path.
A similar divider, using a mixer with its output connected to a tank circuit, is shown in U.S. Pat. No. 3,140,447 to Olbrych. This divider also includes a frequency multiplier and a second tank circuit in the feedback path.
Polaniecki, in U.S. Pat. No. 3,316,478, shows a regenerative frequency changer with a diode mixer having an input connected to the frequency changer output through a frequency multiplier comprising a DC blocking capacitor and a varactor diode. The varactor in this circuit is used for frequency multiplication rather than filtering.
U.S. Pat. No. 2,944,205 to Keizer et al. shows another frequency divider employing a varactor and, in one embodiment shown in FIG. 7, shows a source of bias voltage for starting the operation of the frequency divider.
Egbert et al., in U.S. Pat. No. 3,662,287, shows a voltage-controlled oscillator multiplier in which a single varactor tunes an oscillator and produces frequency multiplication. An adjustable battery source is employed. Other high-speed divider circuits are shown in U.S. Pat. Nos. 3,997,796 to Sanders et al. and 4,357,580 to Mawhinney.
U.S. Pat. No. 3,358,215 to Swan shows a frequency doubler circuit using a varactor in the feedback path of a closed loop to generate harmonics of the input frequency to the doubler. All frequencies but the desired output frequency are filtered out by RC bandstop filters. A fixed source of varactor bias voltage is shown.